Definition of GPIO registers addresses. More...

#include <peripherals/base.h>

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Enumerations
enum	gpio_func { GF_INPUT = 0, GF_OUTPUT = 1, GF_ALT_0 = 4, GF_ALT_1 = 5, GF_ALT_2 = 6, GF_ALT_3 = 7, GF_ALT_4 = 3, GF_ALT_5 = 2 }

enum	{ GPIO_BASE = (MMIO_BASE + 0x200000), GPFSEL0 = (GPIO_BASE + 0x00), GPFSEL1 = (GPIO_BASE + 0x04), GPFSEL2 = (GPIO_BASE + 0x08), GPFSEL3 = (GPIO_BASE + 0x0C), GPFSEL4 = (GPIO_BASE + 0x10), GPFSEL5 = (GPIO_BASE + 0x14), GPSET0 = (GPIO_BASE + 0x1C), GPSET1 = (GPIO_BASE + 0x20), GPCLR0 = (GPIO_BASE + 0x28), GPCLR1 = (GPIO_BASE + 0x2C), GPLEV0 = (GPIO_BASE + 0x34), GPLEV1 = (GPIO_BASE + 0x38), GPEDS0 = (GPIO_BASE + 0x40), GPEDS1 = (GPIO_BASE + 0x44), GPREN0 = (GPIO_BASE + 0x4C), GPREN1 = (GPIO_BASE + 0x50), GPFEN0 = (GPIO_BASE + 0x58), GPFEN1 = (GPIO_BASE + 0x5C), GPHEN0 = (GPIO_BASE + 0x64), GPHEN1 = (GPIO_BASE + 0x68), GPLEN0 = (GPIO_BASE + 0x70), GPLEN1 = (GPIO_BASE + 0x74), GPAREN0 = (GPIO_BASE + 0x7C), GPAREN1 = (GPIO_BASE + 0x80), GPAFEN0 = (GPIO_BASE + 0x88), GPAFEN1 = (GPIO_BASE + 0x8C), GPIO_PUP_PDN_CNTRL_REG0 = (GPIO_BASE + 0xE4), GPIO_PUP_PDN_CNTRL_REG1 = (GPIO_BASE + 0xE8), GPIO_PUP_PDN_CNTRL_REG2 = (GPIO_BASE + 0xEC), GPIO_PUP_PDN_CNTRL_REG3 = (GPIO_BASE + 0xF0) }

Detailed Description

Definition of GPIO registers addresses.

GPIO : General Purpose IO

Enumerations